Home Technology News Today SK hynix Starts Mass-Production of HBM2E High-Speed DRAM

SK hynix Starts Mass-Production of HBM2E High-Speed DRAM

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SK hynix introduced that it has began the full-scale mass-production of high-speed DRAM, ‘HBM2E’, solely ten months after the Company introduced the event of the brand new product in August final yr. SK hynix’s HBM2E helps over 460 GB (Gigabyte) per second with 1,024 I/Os (Inputs/Outputs) primarily based on the three.6 Gbps (gigabits-per-second) pace efficiency per pin. It is the quickest DRAM answer within the business, with the ability to transmit 124 FHD (full-HD) films (3.7 GB every) per second. The density is 16 GB by vertically stacking eight 16 Gb chips by means of TSV (Through Silicon Via) know-how, and it’s greater than doubled from the earlier technology (HBM2).

HBM2E boasts high-speed, high-capacity, and low-power traits; it’s an optimum reminiscence answer for the next-generation AI (Artificial Intelligence) programs together with Deep Learning Accelerator and High-Performance Computing, which all require high-level computing efficiency. Furthermore, it’s anticipated to be utilized to the Exascale supercomputer – a high-performance computing system which might carry out calculations a quintillion instances per second – that may lead the analysis of next-generation fundamental and utilized science, similar to local weather modifications, bio-medics, and area exploration.

“SK hynix has been in the forefront of technology innovation that contributes to human civilization with achievements including the world’s first development of HBM products,” stated Jonghoon Oh, Executive Vice President and Chief Marketing Officer (CMO) at SK hynix. “With the full-scale mass-production of HBM2E, we will continue to strengthen our presence in the premium memory market and lead the fourth industrial revolution.”

Annotation

■ HBM (High Bandwidth Memory)

  • High efficiency, excessive bandwidth reminiscence merchandise that undertake TSV know-how to dramatically speed up information processing pace over conventional DRAMs.

■ TSV (Through Silicon Via)

  • An interconnecting know-how that connects the higher and decrease chips by means of 1000’s of high quality holes on DRAM chip.
  • Delivers information, instructions, and currents by means of column-shaped paths that penetrate all the silicon wafer thickness after stacking a number of DRAM chips on the buffer chip.
  • Up to 30% lower in dimension and as much as 50% lower in energy consumption over current packaging strategies.

■ Standards for information course of pace conversion

  • 1 GB = 8Gb
  • 3.6 Gbps per pin with 1024 information I/Os (Inputs/Outputs) = 3686.4 Gbps
  • 3686.4 Gbps / 8 = 460.Eight GB/s (Gb -> GB conversion)



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