It would appear that Micron this morning has by accident spilled the beans on the way forward for graphics card reminiscence applied sciences – and outed one among NVIDIA’s next-generation RTX video playing cards within the course of. In a technical transient that was posted to their web site, dubbed “The Demand for Ultra-Bandwidth Solutions”, Micron detailed their portfolio of high-bandwidth reminiscence applied sciences and the market wants for them. Included on this transient was data on the previously-unannounced GDDR6X reminiscence know-how, in addition to some data on what appears to be the primary card to make use of it, NVIDIA’s GeForce RTX 3090.
The doc appears to have been posted a month (or extra) early, given the point out of the NVIDIA card, which we’re not anticipating to be introduced any earlier than at NVIDIA’s September occasion. Furthermore the doc hyperlinks to different, still-unpublished Micron technical briefs involving GDDR6X. None the much less, the doc does come instantly from Micron’s public webservers, so what we’ve got at this time is an sudden sneak peak at Micron’s upcoming GDDR reminiscence plans.
At any charge, as this can be a market overview reasonably than a technical deep dive, the small print on GDDR6X are slim. The doc hyperlinks to a different, still-unpublished doc, “Doubling I/O Performance with PAM4: Micron Innovates GDDR6X to Accelerate Graphics Memory”, that may presumably comprise additional particulars on GDDR6X. None the much less, even this high-level overview offers us a fundamental concept of what Micron has in retailer for later this yr.
The key innovation for GDDR6X seems to be that Micron is transferring from utilizing NRZ coding on the reminiscence bus – a binary (two state) coding format – to 4 state coding within the type of Pulse-Amplitude Modulation 4 (PAM4). In quick, Micron can be doubling the variety of sign states within the GDDR6X reminiscence bus, permitting it to transmit twice as a lot knowledge per clock.
| GPU Memory Math | ||||||
| GDDR6X (RTX 3090) |
GDDR6 (Titan RTX) |
GDDR5X (Titan Xp) |
HBM2 (Titan V) |
|||
| Total Capacity | 12 GB | 12 GB | 12 GB | 12 GB | ||
| B/W Per Pin | 21 Gbps | 14 Gbps | 11.4 Gbps | 1.7 Gbps | ||
| Chip capability | 1 GB (8 Gb) | 1 GB (8 Gb) | 1 GB (8 Gb) | 4 GB (32 Gb) | ||
| No. Chips/KGSDs | 12 | 12 | 12 | 3 | ||
| B/W Per Chip/Stack | 84 GB/s | 56 GB/s | 45.6 GB/s | 217.6 GB/s | ||
| Bus Width | 384-bit | 384-bit | 352-bit | 3072-bit | ||
| Total B/W | 1008 GB/s | 672 GB/s | 548 GB/s | 652.8 GB/s | ||
| DRAM Voltage | ? | 1.35 V | 1.35 V | 1.2 V | ||
| Data Rate | QDR | QDR | DDR | DDR | ||
| Signaling | PAM4 | Binary | Binary | Binary | ||
PAM4 itself is just not a brand new know-how, and has been utilized in different high-end units like community transceivers effectively prior to now. More lately, the PCI-SIG introduced that they’d be adopting PAM4 coding for PCIe 6.0. So for a barely extra detailed dialogue on PAM4, right here is our explaination from our PCIe 6.Zero primer:
At a very excessive degree, what PAM4 does versus NRZ (binary coding) is to take a web page from the MLC NAND playbook, and double the variety of electrical states a single cell (or on this case, transmission) will maintain. Rather than conventional 0/1 excessive/low signaling, PAM4 makes use of Four sign ranges, so {that a} sign can encode for 4 potential two-bit patterns: 00/01/10/11. This permits PAM4 to hold twice as a lot knowledge as NRZ with out having to double the transmission bandwidth, which for PCIe 6.Zero would have resulted in a frequency round 30GHz(!).
NRZ vs. PAM4 (Base Diagram Courtesy Intel)
PAM4 itself is just not a brand new know-how, however up till now it’s been the area of ultra-high-end networking requirements like 200G Ethernet, the place the quantity of house obtainable for extra bodily channels is much more restricted. As a consequence, the trade…
