AMD “Renoir” Die Shot Pictured

Here is the primary die visualization of AMD’s new “Renoir” processor. Having made its debut with Ryzen 4000 collection cell processors, “Renoir” succeeds a decade-long legacy of AMD APUs that mix CPUs with highly effective iGPUs. AMD designed “Renoir” on TSMC’s 7 nm silicon fabrication course of. The die measures 156 mm², and has a transistor-count of 9.Eight billion. The die shot reveals distinct areas that appear to be the processor’s Eight CPU cores, a cluster of GPU compute items, the built-in reminiscence controllers, southbridge, and PHYs for the chip’s numerous I/O.

“Renoir” options Eight CPU cores based mostly on the “Zen 2” microarchitecture, divided into two 4-core CCXs (CPU complexes). Unlike on 8-core chiplets meant for “Matisse” or “Rome” MCMs, the “Renoir” CCX solely options Four MB of shared L3 cache, in all probability as a result of latencies to the reminiscence controller are low sufficient. The L2 cache per core is unchanged at 512 KB. The “total cache” (L2 + L3 on silicon) provides as much as 12 MB. The iGPU of “Renoir” is a hybrid between “Vega” and “Navi.” The SIMD parts are carried over from “Vega,” whereas the display- and multimedia engines are from “Navi.” The iGPU options Eight NGCUs that add as much as 512 stream processors. Infinity Fabric covers a lot of the die space, connecting the varied parts on the die. AMD launched a brand new dual-channel built-in reminiscence controller that helps LPDDR4x at as much as 4233 MHz, and normal DDR4 as much as 3200 MHz.