Customer demand for AI and HPC processors is driving a a lot better use of superior packaging applied sciences, significantly TSMC’s chip-on-wafer-on-substrate (CoWoS) providers. As issues stand, TSMC is simply barely assembly the present demand for this packaging methodology – by no means thoughts future demand – which is why final 12 months the corporate introduced plans to greater than double CoWoS capability by the top of 2024. But because it seems, simply doubling capability as soon as will not be sufficient, and the world’s largest contract maker of chips goes to should hold scaling up at a speedy tempo.
At its European Technology Symposium final week TSMC introduced plans to broaden CoWoS capability at a compound annual progress charge (CAGR) of over 60% until at the least 2026. As a outcome, TSMC’s CoWoS capability will greater than quadruple from 2023 ranges by the top of that interval. And retaining in thoughts that TSMC is prepping further variations of CoWoS (specifically CoWoS-L) that may allow constructing system-in-packages (SiPs) of as much as eight reticle sizes, rising CoWoS capability by four-fold in three years might nonetheless not be sufficient. The excellent news is that the assorted third-party off-site meeting and testing (OSAT) suppliers are additionally increasing their CoWoS-like capability, so the demand for superior packing is not an issue that TSMC is dealing with (or resolving) on their very own.
And CoWoS is not the one superior packaging know-how line whose capability TSMC is trying to quickly broaden. The firm additionally has its system-on-integrated chips (SoIC) 3D stacking know-how which adoption is poised to develop within the coming years. To meet demand for its SoIC packaging strategies TSMC will broaden SoIC capability at a 100% compound annual progress charge by the top of 2026. As a outcome, SoIC capability will develop by eight-fold from 2023 ranges by late 2026.
Overall, TSMC itself expects modern SiPs for demanding purposes like AI and HPC will undertake each CoWoS and SoIC 3D stacking applied sciences within the coming years, which is why it wants to extend capability for each strategies to have the ability to construct these highly-complex processors.
