Home Update TSMC Jumps Into Silicon Photonics, Lays Out Roadmap For 12.8…

TSMC Jumps Into Silicon Photonics, Lays Out Roadmap For 12.8…

92
TSMC Jumps Into Silicon Photonics, Lays Out Roadmap For 12.8...


Optical connectivity – and particularly silicon photonics – is anticipated to grow to be a vital expertise to allow connectivity for next-generation datacenters, significantly these designed HPC purposes. With ever-increasing bandwidth necessities wanted to maintain up with (and maintain scaling out) system efficiency, copper signaling alone will not be sufficient to maintain up. To that finish, a number of firms are growing silicon photonics options, together with fab suppliers like TSMC, who this week outlined its 3D Optical Engine roadmap as a part of its 2024 North American Technology Symposium, laying out its plan to carry as much as 12.8 Tbps optical connectivity to TSMC-fabbed processors.

TSMC’s Compact Universal Photonic Engine (COUPE) stacks an electronics built-in circuit on photonic built-in circuit (EIC-on-PIC) utilizing the corporate’s SoIC-X packaging expertise. The foundry says that utilization of its SoIC-X allows the bottom impedance on the die-to-die interface and due to this fact the very best vitality effectivity. The EIC itself is produced at a 65nm-class course of expertise.

TSMC’s 1st Generation 3D Optical Engine (or COUPE) might be built-in into an OSFP pluggable machine working at 1.6 Tbps. That’s a switch charge nicely forward of present copper Ethernet requirements – which high out at 800 Gbps – underscoring the speedy bandwidth benefit of optical interconnects for heavily-networked compute clusters, by no means thoughts the anticipated energy financial savings.

Looking additional forward, the 2nd Generation of COUPE is designed to combine into CoWoS packaging as co-packaged optics with a swap, permitting optical interconnections to be dropped at the motherboard stage. This model COUPE will help knowledge switch charges of as much as 6.40 Tbps with lowered latency in comparison with the primary model.

TSMC’s third iteration of COUPE – COUPE working on a CoWoS interposer – is projected to enhance on issues one step additional, rising switch charges to 12.8 Tbps whereas bringing optical connectivity even nearer to the processor itself. At current, COUPE-on-CoWoS is within the pathfinding stage of improvement and TSMC doesn’t have a goal date set.

Ultimately, in contrast to lots of its business friends, TSMC has not participated within the silicon photonics market up till now, leaving this to gamers like GlobalFoundries. But with its 3D Optical Engine Strategy, the corporate will enter this necessary market because it appears to be like to make up for misplaced time.

Related Reading



Source

LEAVE A REPLY

Please enter your comment!
Please enter your name here