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Kaby Lake G Series Processor Info Surfaces

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We already have had rumors about AMD licensing their Radeon IP to Intel. Now, there are rumors about an unannounced product from Intel: a Kaby Lake-G series which would mark Intel’s re-entry in multi chip module in a single package. 

The blue team already has an experience with this Multi-Die design from its Clarkdale family of microprocessors where a 32nm CPU, a 45nm GPU and memory controller was integrated into one package. Kaby Lake-G is rumored to move away from the traditional low data rate implementation and communication between the two parts of the chip, instead utilize Intel EMIB (Embedded Multi Die interconnect Bridge), which according to Intel is more efficient. This is also where HBM integration steps in where the silicon slices would have the ability to access these high speed memories.

For now, rumors suggest that these Kaby Lake-G would be exclusive to the notebook market. It is likely to have a discrete GPU embedded into the die. The TDP of these CPUs are much lower than Kaby Lake–H (45w). This is Intel’s take on addition of discrete GPUs on the die itself. The chips will also feature a package size of 58.5 x 32mm which is bigger than the desktop Kaby Lake S (37.5 x 37.5mm) and Kaby Lake H series chips (42 x 28mm). The extra space would probably be utilized in addition of discrete GPU package. There is a controversy about the manufacturer of the on die GPU, some reports suggest that Intel is manufacturing their own GT2 graphics while others suggest about Intel using AMD graphics on the chip.

The heterogeneous and modular approach to CPU manufacturing would really instrumental for Intel and would probably compete against the AMD APUs which is somewhat based on the same concept. Furthermore, it could also be useful for the new 10nm dies for actual cores, increasing yields from their 10nm process and would allow Intel to recycle old processors with new logic inside the CPU package, allowing the company to distribute production loads across different process (10 & 14nm).

It will be interesting to see if Intel is able to advance with this modular approach and integrating multiple manufacturing processes inside a single package, it would give Intel more flexibility in implementing its fabrication process.

Source: BenchLife via TPU and Computerbase.de

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