Absent from the discrete GPU area for over 20 years, this yr Intel is ready to see the primary fruits from their labors to re-enter that market. The firm has been creating their new Xe household of GPUs for just a few years now, and the primary merchandise are lastly set to reach within the coming months with the Xe-LP-based DG1 discrete GPU, in addition to Tiger Lake’s built-in GPU, kicking off the Xe GPU period for Intel.
But these first Xe-LP merchandise are simply the tip of a a lot bigger iceberg. Intending to develop a complete top-to-bottom GPU product stack, Intel can be engaged on GPUs optimized for the high-power discrete market (Xe-HP), in addition to the high-performance computing market (Xe-HPC).
Xe-HPC, in flip, is arguably crucial of the three segments for Intel, in addition to being the riskiest. The server-class GPU will probably be answerable for broadening Intel’s profitable server enterprise past CPUs, together with warding off NVIDIA and different GPU/accelerator rivals, who in the previous few years have ridden the deep studying wave to booming earnings and market shares that more and more threaten Intel’s conventional market dominance. The server market can be the riskiest market, because of the high-stakes nature of the {hardware}: the one factor larger than the earnings are the chips, and thus the prices to enter the market. So below the watchful eye of Raja Koduri, Intel’s GPU guru, the corporate is gearing as much as stage a serious assault into the GPU area.
That brings us to the matter of this week’s teaser. One of the advantages of being a (comparatively) upstart rival within the GPU enterprise is that Intel doesn’t have any current-generation merchandise that they should defend; with out the chance of Osborning themselves, they’re free to speak about their upcoming merchandise even nicely earlier than they ship. So, as a little bit of a savvy social media ham, Koduri has been posting occasional pictures of Ponte Vecchio, the primary Xe-HPC GPU, as Intel brings it up of their labs.
BFP – large ‘fabulous’ bundle😀 pic.twitter.com/e0mwov1Ch1
— Raja Koduri (@Rajaontheedge) June 25, 2020
Today’s teaser from Koduri reveals off a tray with three completely different Ponte Vecchio chips of various sizes. While detailed details about Ponte Vecchio remains to be restricted, Intel has beforehand commented that Ponte Vecchio could be taking a chiplet route for the GPU, utilizing a number of chiplets to construct bigger and extra highly effective designs. Koduri’s newest photograph, in flip, appears to be like to be a transparent illustration of that, with the bigger chip sizes roughly correlating to 1×2 and 2×2 configurations of the smallest chip.
And with presumably a number of chiplets below the hood, the ensuing chips are fairly sizable. With a useful 18650 battery within the photograph for reference, we will see that the smaller packages are round 65mm extensive, whereas the biggest bundle is definitely approaching 110mm on a aspect. (For refence, an Intel desktop CPU is round 37.5mm x 37.5mm).
Finally, in a separate tweet, Koduri rapidly talks about efficiency: “And..they let me hold peta ops in my palm(almost:)!” Koduri doesn’t go into any element in regards to the numeric format concerned – an necessary qualifier when speaking about compute throughput on GPUs that may course of lower-precision codecs at greater charges – however we’ll be beneficiant and assume INT8 operations. INT8 has change into a reasonably widespread format for deep studying inference, because the integer format gives nice efficiency for neural nets that don’t want excessive precision. NVIDIA’s A100 accelerator, for reference, tops out at 0.624 PetaOPs for normal tensor operations, or 1.248 PetaOps for a sparse matrix.
And that’s the newest on Ponte Vecchio. Though with the components doubtless not delivery till later in 2021 as a part of the Aurora supercomputer, it’s…
