“The Intel Agilex FPGA product family leverages the breadth of Intel innovation and technology leadership, including architecture, packaging, process technology, developer tools and a fast path to power reduction with eASIC technology. These unmatched assets enable new levels of heterogeneous computing, system integration and processor connectivity and will be the first 10nm FPGA to provide cache-coherent and low latency connectivity to Intel Xeon processors with the upcoming Compute Express Link,” stated Dan McNamara, Intel senior vice chairman and basic supervisor of the Networking and Custom Logic Group.
In the data-centric, 5G-fueled period, networking throughput should enhance, and latency should lower. Intel Agilex FPGAs present the pliability and agility required to fulfill these challenges by delivering vital positive factors in performance1 and inherent low latency. Reconfigurable and with decreased energy consumption2, Intel Agilex FPGAs have computation and high-speed interfacing capabilities that allow the creation of smarter, greater bandwidth networks and assist ship real-time actionable insights by way of accelerated synthetic intelligence (AI) and different analytics carried out on the edge, within the cloud and all through the community.
“Microsoft has been working closely with Intel on the development of their Intel Agilex FPGAs and we are planning to use them in a number of upcoming projects. Intel FPGAs have provided tremendous value for us for accelerating real-time AI, networking and other applications/infrastructure across Azure Cloud Services, Bing and other data center services,” stated Doug Burger, technical fellow, Azure Hardware Systems at Microsoft. “We look forward to continued collaboration with Intel to deliver high-quality cloud services, big data analytics and ultra-intelligent web search results for our customers.”
The Intel Agilex household combines a number of progressive Intel applied sciences together with the second-generation HyperFlex FPGA cloth constructed on Intel’s 10nm course of, and heterogeneous 3D silicon-in-package (SiP) know-how based mostly on Intel’s confirmed embedded multi-die interconnect bridge (EMIB) know-how. This mixture of superior applied sciences permits Intel to combine analog, reminiscence, customized computing, customized I/O and Intel eASIC system tiles right into a single bundle together with the FPGA cloth. Intel delivers a customized logic continuum that enables builders to seamlessly migrate their designs from FPGAs to structured ASICs.
Intel Agilex FPGAs present progressive new capabilities to assist speed up the options of tomorrow. Innovations embrace:
- Compute Express Link: Industry’s first FPGA to assist upcoming Compute Express Link (CXL), a cache and reminiscence coherent interconnect to future Intel Xeon Scalable processors.
- 2nd-generation HyperFlex structure: Up to 40% greater efficiency or as much as 40% decrease whole energy in contrast with Intel Stratix 10 FPGAs.
- DSP innovation: Only FPGA supporting hardened BFLOAT16, with as much as 40 teraflops of digital sign processor (DSP) efficiency (FP16).
- Peripheral part interconnect categorical (PCIe) Gen 5: The potential to scale for greater bandwidth in contrast with PCIe Gen 4.
- Transceiver information charges: Support as much as 112 Gbps information charges for high-speed networking necessities for 400GE and past.
- Advanced reminiscence: Support for present DDR4, and upcoming DDR5, HBM, and Intel Optane DC persistent reminiscence.
Design growth for Intel Agilex FPGAs is obtainable right now by way of Intel Quartus Prime Design Software, which delivers the very best efficiency and productiveness for Intel FPGA, CPLD, and SoCs. For extra info, go to this web page.
