The first SSD with QLC NAND surfaced at webshops and the price is interesting with a price of roughly 20 cents per GB. The 660P is an m.2 form factor SSD at PCIe 3.0 x4 and NVMe.
The Intel SSD 660P will become available in 512, 1024 and 2048 GB models at prices of 114, 198 and 391 euro respectively. It depends a bit on volume size, but you can expect sequential read and write speeds in an 1800 and 1100 MB/s range. Random reading and writing of 4k blocks both are tagged with 150,000 IOPs.
QLC Flash is to lower SSD prices further
QLC NAND writes four bits per memory cell and that means less real estate to purchase and thus lower NAND prices. Whether the first SATA SSDs with QLC flash will undercut the mark of 15 cents per gigabyte remains to be seen, but the introduction surely is interesting.
| Intel SSD 660p | |||
|---|---|---|---|
| model | SSDPEKNW512G801 | SSDPEKNW010T801 | SSDPEKNW020T801 |
| memory | 512 GB | 1,024 GB | 2,048 GB |
| form factor | M.2 2280 | ||
| Interface / protocol | PCIe 3.0 x4 / NVMe | ||
| NAND flash | Intel QLC 3D NAND 64 Layer | ||
| price | 113,90 € | 197.75 € | 391.43 € |
| Price / GB | 0,22 € | 0.20 € | 0.20 € |
Basically, QLC NAND thus writes 4 bits per cell. Adding more bits per cell also has an effect on the life-span of the NAND cell, and thus that brings down the number of times it can be written. Much like TLC (Triple-level cell), many new technologies like error-correction mechanisms and wearing have increased the life-span of the respective SSDs. For example, a 500 GB TLC based SSD can quite easily manage a 300TB written before NAND cells start to die off. TLC has roughly a 1000 PE cycles, and that is the claim for QLC as well, a 1000 PE cycles. On 64-layer 4bits/cell NAND technology, Micron is achieving 33 percent higher array density compared to TLC, which enables them to produce the first commercially available 1 terabit die in the history of semiconductors.
“Commercialization of 1Tb 4bits/cell is a big milestone in NVM history and is made possible by numerous innovations in technology and design that further extend the capability of our Floating Gate 3D NAND technology,” said RV Giridhar, Intel vice president, Non-Volatile Memory Technology Development. “The move to 4bits/cell enables compelling new operating points for density and cost in Datacenter and Client storage.”
With the Flash Memory Summit 2018 upon us, we expect lots of QLC related announcements.
