Following Intel’s painful Q2 earnings name and the announcement of their 2025 price discount plan final week, it has change into more and more evident that Intel’s future is within the fingers of their foundry group. Between Intel’s IDM 2.Zero initiative and their inner chip manufacturing plans, all roads lead again to Intel retaking – and retaining – fab course of management. To win as each a chip designer and a contract chip maker, Intel wants to have the ability to regain the fab know-how lead it as soon as held. In many respects it’s a return to Intel’s basic (and most profitable) working mannequin, however by no means has it been so dangerous at it’s for the already weakened Intel.
Intel’s do-or-die sprint for course of management implies that, for the subsequent 18 months or so, all eyes are on the corporate’s 20A and 18A course of nodes. The ultimate nodes of their formidable 5 Nodes in 4 Years roadmap, the twinned 20A/18A are the fruits of a number of new applied sciences, primarily Intel’s GAAFET implementation (RibbonFET), which is being mixed with PowerVia, Intel’s bottom energy supply community (BS-PDN) know-how. 20A is ready to function Intel’s early model of the node, and 18A the refined model for long-term use each internally, and because the first main exterior node for Intel Foundry. To say that all the things rides on Intel 18A isn’t fairly correct, nevertheless it’s solely a slight embellishment.
To that finish, we’re going to see Intel ship quite a lot of standing updates on 18A over the subsequent 12 months as they proceed to stipulate to buyers and exterior prospects alike that they’ve the manufacturing facet of their enterprise so as. And right this moment is a kind of days, with a contemporary replace on the state of 18A.
18A Chips Back & Booting
So what’s new with 18A? The greatest information out of Intel this morning is that their first 18A chips are again from the event fab and are efficiently booting working methods. This means the silicon not solely works (power-on), however works properly sufficient to finish core duties. It’s a significant step in mentioning a chip, and at this level, Intel desires to verify to let the entire world know.
Earlier this 12 months the corporate completed taping out each of its lead 18A chips: Panther Lake for shoppers, and Clearwater Forest for servers. And it’s each chips which are booting. This is made all of the extra important by the truth that Clearwater Forest additionally depends on Intel’s die-to-die hybrid bonding packaging know-how, Foveros Direct 3D, the place will probably be the lead product for that know-how as properly. Which for Intel, is a promising signal that not solely are their silicon lithography ambitions paying off, however their intention to guide in superior packaging is on-track as properly.
And whereas Intel doesn’t usually speak about yields this early within the sport, it’s attention-grabbing to notice that in a separate Q&A being printed this morning with Intel Foundry’s new boss, Kevin O’Buckley, the top of Foundry Services explicitly feedback that Panther Lake is “yielding well”. Similarly, Panther Lake’s DDR reminiscence controller (a posh block mixing logic with a PHY) is already operating at its goal frequency. Progress goes so properly, apparently, that in accordance with O’Buckley, it’s forward of schedule on its product qualification milestones.
PDK 1.0 Released, First External Customer Tape-Out Expected in H1’25
As for Intel’s contract foundry enterprise, the corporate is ramping up its efforts there now that the primary full course of design package (PDK) is prepared for 18A. Intel launched their 18A PDK 1.Zero final month, giving Intel’s prospects (and potential prospects) the instruments to lastly end designing their chips for manufacturing. As is usually the case of a brand new node, pre-release PDKs have been obtainable for firms to get began on their designs,…
